Upside down pyramid-based PERC solar cell with 21.4% efficiency

• A Chinese research study group has developed a PERC cell on an industrial 180-μm-thick monocrystalline silicon wafer with a typical size of 156 × 156 mm2. The cell has an open-circuit voltage (VOC) of 0.677 V, a short short-circuit current (ISC) of 9.63 A, and also a fill factor of 80.30%.

Scientists from China's Jiangsu Ocean University and Chinese PV module supplier Risen Solar Technology have actually declared that they have achieved an efficiency of 21.4% for a passivated emitter rear get in touch with (PERC) solar cell by utilizing high-uniform silicon inverted pyramid (IP) structures.

IPs are light-trapping structures that are understood to have premium antireflection qualities. They can be easily produced on single-crystalline Si wafers by irradiating the surface with a nanosecond-pulsed laser. Similar structures have the advantage of undergoing 3 or more bounces prior to being mirrored away, which means one or two even more bounces contrasted to upright pyramids.

In the past, researchers have actually achieved performances ranging from 18.62% to 20.19% for similar solar cells. But in the most recent Chinese experiment, the researchers used the IP frameworks on a business 180-μm-thick monocrystalline silicon wafer with a basic size of 156 mm2 × 156 mm2 using metal-assisted chemical etching (MACE) and an alkali anisotropic etching method, which they assert work with existing assembly line. The cell emitter was passivated with plasma-enhanced chemical vapor deposition (PECVD) with stack silicon oxide/silicon nitride (SiO2/SiNx) layers.

" Stack dielectric layers are made to maximize the optical homes of long-wavelength by raising inner rear reflectance while preserving a good electrical passivation impact," the researchers described, keeping in mind that the layers were then integrated with the stack aluminum-oxide/silicon nitride (Al2O3/SiNx) passivation of the rear surface area.

In addition to the aforementioned document effectiveness, the cell is also claimed to have revealed an open-circuit voltage (VOC) of 0.677 V, a brief short-circuit current (ISC) of 9.63 A, as well as a fill element of 80.30%.

" The secret to high performance lies in the optical prevalence of the IP textures and also the decreased electric losses by the simultaneous passivation of Si IP-based n+ emitter and rear surface area," the academics stated. "This unique Si IP-based PERC tool structure as well as technique reveal a terrific possible in automation of high-efficiency silicon-based solar cell."

The researchers explained the solar cell in "High-Efficiency Silicon Inverted Pyramid-Based Passivated Emitter as well as Rear Cells," which was just recently published in Nanoscale Research Letters.